br Results with scrubbing process Based on the

Results with scrubbing process Based on cdk1 pathway discussion of Section 4.4 and area availability results of the previous section, scrubbing process, at the pixel processing rate, was included to mitigate error accumulation on the arrays and on the line-buffer. Eight sequential signals, plus the respective TMR registers, and three combinatorial signals where enough to implement the scrubbing process. The resulting erate estimate (Table 5, first line) fell to 0.010% and the number of LCs in Table 8, for the ProASIC3 device, rose slightly to 8k3 (22%). The significant susceptibility reduction is in accordance with the expectations obtained for the contribution of the arrays and the line-buffer (Table 5, lines 2 and 4, respectively). The results obtained with the additional scrubbing corroborated the coherence of the susceptibility evaluation method. Despite the accuracy that shall be considered with caution, as discussed in Section 4.3, the method exceeded the expectations as a tool for fault tolerance analysis.
Conclusions